The MC10H/100H607 is a 6–bit, registered PECL to TTL translator. The device features differential PECL inputs for both data and clock. The TTL outputs feature 48mA sink, 24mA source drive capability for driving high fanout loads or transmission lines. The asynchronous master reset control is an ECL level input.
   
• Differential ECL Data and Clock Inputs
• 48mA Sink, 24mA Source TTL Outputs
• Single Power Supply
• Multiple Power and Ground Pins to Minimize Noise