Functional Description
The CY7B9910 and CY7B9920 Low Skew Clock Buffers offer low-skew system clock distribution. These multiple-output clock drivers optimize the timing of high-performance computer systems. Eight individual drivers can each drive terminated transmission lines with impedances as low as 50Ω while delivering minimal and specified output skews and full-swing logic levels (CY7B9910 TTL or CY7B9920 CMOS).

FEATUREs
• All outputs skew <100 ps typical (250 max.)
• 15- to 80-MHz output operation
• Zero input to output delay
• 50% duty-cycle outputs
• Outputs drive 50Ω terminated lines
• Low operating current
• 24-pin SOIC package
• Jitter: <200 ps peak to peak, <25 ps RMS
• Compatible with Pentium™-based processors