datasheetbank_Logo
búsqueda de Hoja de datos y gratuito Fichas de descarga
HOME  >>>  Nexperia B.V. All rights reserved  >>> 74AHC00BQ-Q100 PDF

74AHC00BQ-Q100(2013) Hoja de datos - Nexperia B.V. All rights reserved

74AHC00-Q100 image

Número de pieza
74AHC00BQ-Q100

componentes Descripción

Other PDF
  lastest PDF  

PDF
DOWNLOAD     

page
15 Pages

File Size
637.4 kB

Fabricante
NEXPERIA
Nexperia B.V. All rights reserved 

General description
   The 74AHC00-Q100; 74AHCT00-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. JESD7-A.
   The 74AHC00-Q100; 74AHCT00-Q100 provides the quad 2-input NAND function.

Features and benefits
◾ Automotive product qualification in accordance with AEC-Q100 (Grade 1)
   ✦ Specified from -40 °C to +85 °C and from -40 °C to +125 °C
◾ Balanced propagation delays
◾ All inputs have Schmitt-trigger actions
◾ Inputs accept voltages higher than VCC
◾ Input levels:
   ✦ For 74AHC00-Q100: CMOS level
   ✦ For 74AHCT00-Q100: TTL level
◾ ESD protection:
   ✦ MIL-STD-883, method 3015 exceeds 2000 V
   ✦ HBM JESD22-A114F exceeds 2000 V
   ✦ MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
◾ Multiple package options


Share Link: GO URL

All Rights Reserved© datasheetbank.com  [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]