DS2181A Ver la hoja de datos (PDF) - Maxim Integrated

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DS2181A

CEPT Primary Rate Transceiver

Maxim Integrated 

DS2181A

FIXED FRAME RESYNC CRITERIA

When enabled via RCR.1, the device will automatically initiate frame search whenever the frame

alignment word is received in error three consecutive times.

FIXED CAS MULTIFRAME RESYNC CRITERIA

When enabled via RCR.1, the device will automatically initiate frame search whenever two consecutive

CAS multiframe alignment words are received in error.

FIXED CRC4 RESYNC CRITERIA

If CCR.1=1 or if the TEST pin is tied high, then the DS2181A will initiate the resync at the FAS level if

915 or more CRC4 words out of 1000 are received in error.

CAS SIGNALLING SOURCE

CAS applications sample signaling data at TSER when TCR.6 = 0; an on-chip data multiplexer accepts

channel-associated data input at TSD when TCR.6 = 1. The data multiplexer must be disabled (TCR.6 =

0) when the CCS mode is enabled (TCR.5 = 1).

TSD INPUT TIMING (TCR.6 = 1; TCR.5 = 0) Table 6

FRAME #

TIMESLOT SIGNALING

DATA SAMPLED AT TSD

0

17

1

1, 18

2

2, 19

3

3, 20

4

4, 21

5

5, 22

6

6, 23

7

7, 24

8

8, 25

9

9, 26

10

0, 27

11

11, 28

12

12, 29

13

13, 30

14

14, 31

15

15

NOTE:

1. A, B, C and D data is sampled on falling edges of TCLK during bit times 5, 6, 7 and 8 of timeslots

indicated.

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