CY7C1021DV33-10BVXI Ver la hoja de datos (PDF) - Cypress Semiconductor
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CY7C1021DV33-10BVXI Datasheet PDF : 13 Pages
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CY7C1021DV33
Data Retention Characteristics Over the Operating Range
Parameter
Description
Conditions
VDR
ICCDR
VCC for Data Retention
Data Retention Current
VCC = VDR = 2.0V, CE > VCC – 0.3V,
VIN > VCC – 0.3V or VIN < 0.3V
tCDR[5]
tR[13]
Chip Deselect to Data Retention Time
Operation Recovery Time
Industrial
Automotive
Min.
2
0
tRC
Max.
3
15
Unit
V
mA
mA
ns
ns
Data Retention Waveform
DATA RETENTION MODE
VCC
3.0V
VDR > 2V
3.0V
tCDR
tR
CE
Switching Waveforms
Read Cycle No. 1 (Address Transition Controlled)[14, 15]
tRRCC
ADDRESS
DATA OUT
tAA
tOHA
PREVIOUS DATA VALID
DATA VALID
Read Cycle No. 2 (OE Controlled)[15, 16]
ADDRESS
tRC
CE
OE
BHE, BLE
DATA OUT
VCC
SUPPLY
CURRENT
tACE
tDOE
tLZOE
tDBE
tLZBE
HIGH IMPEDANCE
tLZCE
tPU
50%
DATA VALID
Notes
13. Full device operation requires linear VCC ramp from VDR to VCC(min.) > 50 s or stable at VCC(min.) > 50 s.
14. Device is continuously selected. OE, CE, BHE and/or BLE = VIL.
15. WE is HIGH for Read cycle.
16. Address valid prior to or coincident with CE transition LOW.
Document #: 38-05460 Rev. *F
tHZOE
tHZCE
tHZBE
HIGH
IMPEDANCE
tPD
ICC
50%
ISB
Page 6 of 13
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