74HC3G07DP Ver la hoja de datos (PDF) - Nexperia B.V. All rights reserved
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74HC3G07DP Datasheet PDF : 12 Pages
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Nexperia
VI 90 %
tW
negative
pulse
VM
10 %
0V
tf
VI
positive
pulse
tr
90 %
VM
10 %
0V
tW
74HC3G07; 74HCT3G07
Triple buffer with open-drain outputs
VM
tr
tf
VM
VI
G
VCC
VO
DUT
RT
VCC
RL S1
CL
open
Fig. 6.
001aad983
Test data is given in Table 10.
Definitions for test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
S1 = Test selection switch.
Test circuit for measuring switching times
Table 10. Test data
Type
Input
VI
74HC3G07
GND to VCC
74HCT3G07
GND to 3 V
tr, tf
≤ 6 ns
≤ 6 ns
Load
CL
50 pF
50 pF
RL
1 kΩ
1 kΩ
S1 position
tPZL, tPLZ
VCC
VCC
74HC_HCT3G07
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 24 January 2019
© Nexperia B.V. 2019. All rights reserved
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