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HIP6006

Buck and Synchronous-Rectifier Pulse-Width Modulator (PWM) Controller

Renesas Electronics 

HIP6006

HIP6006

operation with an overload condition. Note that the inductor

current increases to over 15A during the CSS charging interval

and causes an over-current trip. The converter dissipates very

little power with this method. The measured input power for the

conditions of Figure 4 is 2.5W.

The over-current function will trip at a peak inductor current

(IPEAK) determined by:

IPEAK = I--O-----C----S----rE--D--T--S------O-R----NO-----C----S----E----T--

where IOCSET is the internal OCSET current source (200A -

typical). The OC trip point varies mainly due to the MOSFETs

rDS(ON) variations. To avoid over-current tripping in the normal

operating load range, find the ROCSET resistor from the

equation above with:

1. The maximum rDS(ON) at the highest junction temperature.

2. The minimum IOCSET from the specification table.

3. wDheeterreminI eisItPhEeAoKuftopruItPiEnAdKuctoIOr UriTppMleAXcu+rrenIt. 2 ,

For an equation for the ripple current see the section under

component guidelines titled ‘Output Inductor Selection’.

A small ceramic capacitor should be placed in parallel with

ROCSET to smooth the voltage across ROCSET in the

presence of switching noise on the input voltage.

Application Guidelines

Layout Considerations

As in any high frequency switching converter, layout is very

important. Switching current from one power device to another

can generate voltage transients across the impedances of the

interconnecting bond wires and circuit traces. These

interconnecting impedances should be minimized by using

wide, short printed circuit traces. The critical components

should be located as close together as possible using ground

plane construction or single point grounding.

VIN

HIP6006

UGATE

PHASE

LGATE

PGND

Q1

LO

VOUT

Q2 D2

CIN

CO

RETURN

FIGURE 5. PRINTED CIRCUIT BOARD POWER AND

GROUND PLANES OR ISLANDS

Figure 5 shows the critical power components of the converter.

To minimize the voltage overshoot the interconnecting wires

indicated by heavy lines should be part of ground or power

plane in a printed circuit board. The components shown in

Figure 6 should be located as close together as possible.

Please note that the capacitors CIN and CO each represent

numerous physical capacitors. Locate the HIP6006 within 3

inches of the MOSFETs, Q1 and Q2. The circuit traces for the

MOSFETs’ gate and source connections from the HIP6006

must be sized to handle up to 1A peak current.

Figure 6 shows the circuit traces that require additional layout

consideration. Use single point and ground plane construction

for the circuits shown. Minimize any leakage current paths on

the SS PIN and locate the capacitor, Css close to the SS pin

because the internal current source is only 10A. Provide local

VCC decoupling between VCC and GND pins. Locate the

capacitor, CBOOT as close as practical to the BOOT and

PHASE pins.

BOOT

D1

CBOOT

HIP6006

PHASE

SS

+12V

CSS

GND

VCC

CVCC

+VIN

Q1 LO

VOUT

Q2 CO

FIGURE 6. PRINTED CIRCUIT BOARD SMALL SIGNAL

LAYOUT GUIDELINES

Feedback Compensation

Figure 7 highlights the voltage-mode control loop for a

synchronous-rectified buck converter. The output voltage

(Vout) is regulated to the Reference voltage level. The error

amplifier (Error Amp) output (VE/A) is compared with the

oscillator (OSC) triangular wave to provide a pulse-width

modulated (PWM) wave with an amplitude of VIN at the PHASE

node. The PWM wave is smoothed by the output filter (LO and

CO).

The modulator transfer function is the small-signal transfer

function of Vout/VE/A. This function is dominated by a DC Gain

and the output filter (LO and CO), with a double pole break

frequency at FLC and a zero at FESR. The DC Gain of the

modulator is simply the input voltage (VIN) divided by the peak-

to-peak oscillator voltage VOSC.

Modulator Break Frequency Equations

FLC=

------------------1--------------------

2  LO  CO

FESR= -2---------------E----S--1---R----------C----O-----

The compensation network consists of the error amplifier

(internal to the HIP6006) and the impedance networks ZIN and

ZFB. The goal of the compensation network is to provide a

FN4306 Rev.3.00

April 1, 2005

Page 6 of 12

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