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PUMD10,125 Ver la hoja de datos (PDF) - NXP Semiconductors.

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PUMD10,125 Datasheet PDF : 17 Pages
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NXP Semiconductors
PEMD10; PUMD10
NPN/PNP resistor-equipped transistors; R1 = 2.2 k, R2 = 47 k
10. Packing information
Table 9. Packing methods
The indicated -xxx are the last three digits of the 12NC ordering code.[1]
Type number Package Description
Packing quantity
3000 4000 8000 10000
PEMD10
SOT666 2 mm pitch, 8 mm tape and reel
-
-
-315 -
4 mm pitch, 8 mm tape and reel
-
-115 -
-
PUMD10
SOT363 4 mm pitch, 8 mm tape and reel; T1 [2] -115 -
-
-135
4 mm pitch, 8 mm tape and reel; T2 [3] -125 -
-
-165
[1] For further information and the availability of packing methods, see Section 14.
[2] T1: normal taping
[3] T2: reverse taping
11. Soldering
2.75
2.45
2.1
1.6
0.538
2 1.7 1.075
0.55
(2×)
0.4
(6×) 0.25 0.3
(2×) (2×)
1.7
0.45
0.6
(4×)
(2×)
0.5
0.65
(4×)
(2×)
0.325 0.375
(4×) (4×)
Reflow soldering is the only recommended soldering method.
Fig 18. Reflow soldering footprint PEMD10 (SOT666)
solder lands
placement area
solder paste
occupied area
Dimensions in mm
sot666_fr
PEMD10_PUMD10
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 4 January 2012
© NXP B.V. 2012. All rights reserved.
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