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NM24C32LEN

32K-Bit Extended 2-Wire Bus Interface Serial EEPROM with Write Protect

Fairchild Semiconductor 

Write Cycle Timing (Figure 1)

SCL

SDA

8th BIT

WORD n

ACK

STOP

CONDITION

tWR

START

CONDITION

Data Validity (Figure 2)

SCL

SDA

DATA STABLE

DATA

CHANGE

Definition of Start and Stop (Figure 3)

SCL

SDA

START

BIT

STOP

BIT

Acknowledge Response from Receiver (Figure 4)

SCL FROM

MASTER

1

Data Output

from Transmitter

Data Output

from Receiver

START

8

9

Acknowledge

DS500073-4

DS500073-5

DS500073-6

DS500073-7

NM24C32 Rev. C.2

7

www.fairchildsemi.com

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