NXP Semiconductors
74LVC27
Triple 3-input NOR gate
13. Abbreviations
Table 9. Abbreviations
Acronym
Description
CDM
Charged Device Model
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
MM
Machine Model
TTL
Transistor-Transistor Logic
14. Revision history
Table 10. Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
74LVC27 v.6
Modifications:
20111027
Product data sheet
-
• Table 7 : values added for lower voltage ranges.
74LVC27 v.5
74LVC27 v.5
Modifications:
20110909
Product data sheet
-
74LVC27 v.4
• The format of this data sheet has been redesigned to comply with the new identity guidelines
of NXP Semiconductors.
• Legal texts have been adapted to the new company name where appropriate.
• Table 4, Table 5, Table 6, Table 7 and Table 8: values added for lower voltage ranges.
74LVC27 v.4
20040113
Product specification -
74LVC27 v.3
74LVC27 v.3
19980428
Product specification -
74LVC27 v.2
74LVC27 v.2
19980406
Product specification -
74LVC27 v.1
74LVC27 v.1
-
-
-
-
74LVC27
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 27 October 2011
© NXP B.V. 2011. All rights reserved.
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