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HEF4794B-Q100 Datasheet PDF : 14 Pages
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Nexperia
HEF4794B-Q100
8-stage shift-and-store register LED driver
10. Dynamic characteristics
Table 7. Dynamic characteristics
VSS = 0 V; Tamb = 25 °C unless otherwise specified. For test circuit, see Fig. 10.
Symbol Parameter
tPHL
HIGH to LOW
propagation delay
Conditions
CP to QS1;
see Fig. 6
VDD
5V
10 V
Extrapolation formula
[1] 132 ns + (0.55 ns/pF)CL
53 ns + (0.23 ns/pF)CL
15 V
37 ns + (0.16 ns/pF)CL
CP to QS2;
see Fig. 6
tPLH
LOW to HIGH
CP to QS1;
propagation delay see Fig. 6
CP to QS2;
see Fig. 6
tPZL
OFF-state to LOW CP to QPn;
propagation delay see Fig. 6
5V
10 V
15 V
5V
10 V
15 V
5V
10 V
15 V
5V
10 V
92 ns + (0.55 ns/pF)CL
39 ns + (0.23 ns/pF)CL
32 ns + (0.16 ns/pF)CL
[1] 102 ns + (0.55 ns/pF)CL
44 ns + (0.23 ns/pF)CL
32 ns + (0.16 ns/pF)CL
102 ns + (0.55 ns/pF)CL
49 ns + (0.23 ns/pF)CL
37 ns + (0.16 ns/pF)CL
15 V
STR to QPn;
see Fig. 7
5V
10 V
15 V
tPLZ
LOW to OFF-state CP to QPn;
propagation delay see Fig. 6
5V
10 V
15 V
STR to QPn;
see Fig. 7
5V
10 V
15 V
ten
enable time
OE to QPn;
see Fig. 8
5 V [2]
10 V
15 V
tdis
disable time
OE to QPn;
see Fig. 8
5 V [2]
10 V
15 V
tt
transition time
QS1, QS2;
5 V [1][3] 35 ns + (1.00 ns/pF)CL
see Fig. 6
10 V
19 ns + (0.42 ns/pF)CL
15 V
16 ns + (0.28 ns/pF)CL
tW
pulse width
CP LOW and
5V
HIGH; see Fig. 6 10 V
15 V
STR HIGH;
see Fig. 7
5V
10 V
15 V
Min Typ
-
160
-
65
-
45
-
120
-
50
-
40
-
130
-
55
-
40
-
130
-
60
-
45
-
240
-
80
-
55
-
140
-
70
-
55
-
170
-
75
-
60
-
100
-
40
-
35
-
100
-
55
-
50
-
80
-
40
-
30
-
85
-
40
-
30
60 30
30 15
24 12
80 40
60 30
24 12
Max Unit
320 ns
130 ns
90 ns
240 ns
100 ns
80 ns
260 ns
110 ns
80 ns
260 ns
120 ns
90 ns
480 ns
160 ns
110 ns
280 ns
140 ns
110 ns
340 ns
150 ns
120 ns
200 ns
100 ns
70 ns
200 ns
110 ns
100 ns
160 ns
80 ns
60 ns
170 ns
80 ns
60 ns
- ns
- ns
- ns
- ns
- ns
- ns
HEF4794B_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 7 November 2018
© Nexperia B.V. 2018. All rights reserved
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