ML6692 Ver la hoja de datos (PDF) - Micro Linear Corporation
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ML6692 Datasheet PDF : 21 Pages
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INITIALIZATION INTERFACE REGISTER
BIT(S)
NAME
DESCRIPTION
R/W
I.15 PHY A4
PHY address bit 4
I.14 PHY A3
PHY address bit 3
I.13 PHY A2
PHY address bit 2
I.12 PHY A1
PHY address bit 1
I.11 PHY A0
PHY address bit 0
I.10 10HDUP
10BASE-T half duplex initialization bit
1 = 10BASE-T (half-duplex) capability
0 = no 10BASE-T (half-duplex) capability
I.9 10FDUP
10BASE-T full duplex initialization bit
1 = 10Mb/s full duplex capability
0 = no 10Mb/s full duplex capability
I.8 100T4
100BASE-T4 initialization bit
1 = 100BASE-T4 capability
0 = no 100BASE-T4 capability
I.7 ISODIS
Isolate bit disable (bit 0.10)
I.6 REPEATER
Repeater mode: when this bit is set to 1,
CRS isonly asserted when receiving non-idle
signal at TPINP/N, and the ML6692 is
forced to half duplex mode
I.5–I.0 Not used
Note: Bits I<10:8> are the values for bits 1.11, 1.12 and 1.15 and initial values for bits 4.5, 4.6 and 4.9 of the MII Management Interface.
Table 1. Initialization Interface Register
MII MANAGEMENT INTERFACE REGISTERS
BIT(S)
0.15 Reset
NAME
0.14 Loopback
0.13 Manual speed select
(Active when 0.12 = 0)
0.12 Auto negotiation enable
0.11 Power down
0.10 Isolate
0.9 Restart auto negotiation
0.8 Duplex mode
0.7 Collision Test
0.6 – 0.0 Not Used
DESCRIPTION
1 = reset all register bits to defaults
0 = normal operation
1 = PMD loopback mode
0 = normal operation
1 = 100Mb/s
0 = 10Mb/s
1 = enable auto negotiation
0 = disable auto negotiation
1 = power down
0 = normal operation
1 = electrically isolate the ML6692 from MII
0 = normal operation
1 = restart auto negotiation
0 = normal operation
1 = Full duplex select, auto negotiation disabled
0 = Half duplex select, auto negotiation disabled
1 = enable COL signal test
0 = normal operation
R/W
R/W, SC
R/W
R/W
R/W
R/W
R/W
R/W, SC
R/W
R/W
Table 2. Control Register
ML6692
DEFAULT
0
0
0
0
0
0
0
0
0
0
DEFAULT
0
0
1
1
0
1
0
0
0
15
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