
Truth Tables
(Each Flip-flop)
Synchronous Operation
Inputs
Dn
L
H
L
H
X
X
CPa
L
L
H
CPb
L
L
H
MR
L
L
L
L
L
L
X
L
L
L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
t = Time before CP positive transition
t+1 = Time after CP positive transition
= LOW-to-HIGH transition
Outputs
Qn(t+1)
L
H
L
H
Qn(t)
Qn(t)
Qn(t)
Logic Diagram
Asynchronous Operation
Inputs
Outputs
Dn
CPa
CPb
MR
Qn(t+1)
X
X
X
H
L
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