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74VHC245M

OCTAL BUS TRANSCEIVER (3-STATE)

STMicroelectronics 

74VHC245

OCTAL BUS

TRANSCEIVER (3-STATE)

s HIGH SPEED: tPD = 4.0 ns (TYP.) at VCC = 5V

s LOW POWER DISSIPATION:

ICC = 4 µA (MAX.) at TA=25°C

s HIGH NOISE IMMUNITY:

VNIH = VNIL = 28% VCC (MIN.)

s POWER DOWN PROTECTION ON

CONTROL INPUTS

s SYMMETRICAL OUTPUT IMPEDANCE:

|IOH| = IOL = 8 mA (MIN)

s BALANCED PROPAGATION DELAYS:

tPLH ≅ tPHL

s OPERATING VOLTAGE RANGE:

VCC(OPR) = 2V to 5.5V

s PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 245

s IMPROVED LATCH-UP IMMUNITY

s LOW NOISE: VOLP = 0.9V (MAX.)

DESCRIPTION

The 74VHC245 is an advanced high-speed

CMOS OCTAL BUS TRANSCEIVER (3-STATE)

fabricated with sub-micron silicon gate and

double-layer metal wiring C2MOS technology.

This IC is intended for two-way asynchronous

communication between data busses; the

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74VHC245M

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74VHC245MTR

74VHC245TTR

direction of data transmission is determined by

DIR input. The enable input G can be used to

disable the device so that the busses are

effectively isolated.

All inputs and outputs are equipped with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage.

All floating bus terminals during High Z State must

be held HIGH or LOW.

PIN CONNECTION AND IEC LOGIC SYMBOLS

June 2001

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