74ALVCH16825DGG Ver la hoja de datos (PDF) - NXP Semiconductors.
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74ALVCH16825DGG Datasheet PDF : 14 Pages
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Nexperia
74ALVCH16825
18-bit buffer/driver; 3-state
VI 90 %
tW
negative
pulse
VM
10 %
0V
tf
VI
positive
pulse
tr
90 %
VM
10 %
0V
tW
VI
G
VCC
VO
DUT
RT
VM
tr
tf
VM
VEXT
RL
CL
RL
001aae331
Test data is given in Table 9.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Figure 8. Test circuit for measuring switching times
Table 9. Test data
Supply voltage
VCC
2.3 V to 2.7 V
2.7 V
3.0 V to 3.6 V
Input
VI
VCC
2.7 V
2.7 V
tr, tf
≤ 2.0 ns
≤ 2.5 ns
≤ 2.5 ns
Load
CL
30 pF
50 pF
50 pF
RL
500 Ω
500 Ω
500 Ω
VEXT
tPLH, tPHL
open
open
open
tPLZ, tPZL
2 x VCC
2 x VCC
2 x VCC
tPHZ, tPZH
GND
GND
GND
74ALVCH16825
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 6 April 2018
© Nexperia B.V. 2018. All rights reserved.
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