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74LVT640DB

3.3 V Octal transceiver with direction pin; inverting; 3-state

NXP Semiconductors. 

Nexperia

74LVT640

3.3 V Octal transceiver with direction pin; inverting; 3-state

10.1 Waveforms and test circuit

VI

An, Bn input

VM

VM

GND

VOH

tPHL

tPLH

Bn, An output

VM

VM

VOL

See Table 8 for measurement points.

VOL and VOH are typical output voltage levels that occur with the output load.

Figure 5. Input (An, Bn) to output (Bn, An) propagation delays

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VI

OE input

VM

GND

tPLZ

tPZL

3.0 V

output

LOW-to-OFF

OFF-to-LOW

VOL

VOH

output

HIGH-to-OFF

OFF-to-HIGH

GND

tPHZ

VX

VY

outputs

enabled

VM

tPZH

outputs

disabled

VM

outputs

enabled

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See Table 8 for measurement points.

VOL and VOH are typical output voltage levels that occur with the output load.

Figure 6. 3-state output enable and disable times

Table 8. Measurement points

Input

VI

GND to 2.7 V

VM

1.5 V

Output

VM

1.5 V

Vx

VOL + 0.3 V

Vy

VOH - 0.3 V

74LVT640

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 3 — 10 April 2017

© Nexperia B.V. 2017. All rights reserved.

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