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ATMEGA128

8-bit Microcontroller with 128K Bytes In-System Programmable Flash

Atmel Corporation 

AVR ATmega128

Memories

In-System

Reprogrammable Flash

Program Memory

This section describes the different memories in the ATmega128. The AVR architecture

has two main memory spaces, the Data Memory and the Program Memory space. In

addition, the ATmega128 features an EEPROM Memory for data storage. All three

memory spaces are linear and regular.

The ATmega128 contains 128K bytes On-chip In-System Reprogrammable Flash mem-

ory for program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is

organized as 64K x 16. For software security, the Flash Program memory space is

divided into two sections, Boot Program section and Application Program section.

The Flash memory has an endurance of at least 10,000 write/erase cycles. The

ATmega128 Program Counter (PC) is 16 bits wide, thus addressing the 64K program

memory locations. The operation of Boot Program section and associated Boot Lock

bits for software protection are described in detail in “Boot Loader Support – Read-

While-Write Self-Programming” on page 276. “Memory Programming” on page 289 con-

tains a detailed description on Flash programming in SPI, JTAG, or Parallel

Programming mode.

Constant tables can be allocated within the entire program memory address space (see

the LPM – Load Program Memory and ELPM – Extended Load Program Memory

instruction description).

Timing diagrams for instruction fetch and execution are presented in “Instruction Execu-

tion Timing” on page 15.

Figure 8. Program Memory Map

Program Memory

$0000

Application Flash Section

18 ATmega128

Boot Flash Section

$FFFF

2467O–AVR–10/06

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