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74LVC374A-Q100

Octal D-type flip-flop with 5 V tolerant inputs/outputs; positive edge-trigger; 3-state

NXP Semiconductors. 

NXP Semiconductors

74LVC374A-Q100

Octal D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state

5. Pinning information

5.1 Pinning

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2( 

4 

' 

' 

4 

4 

' 

' 

4 

*1' 

 9&&

 4

 '

 '

 4

 4

 '

 '

 4

 &3

DDD

Fig 5. Pin configuration SO20 and TSSOP20

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WHUPLQDO 

LQGH[ DUHD

4 

' 

' 

4 

4 

' 

' 

4 

*1'

 4

 '

 '

 4

 4

 '

 '

 4

DDD

7UDQVSDUHQW WRS YLHZ

(1) This is not a supply pin. The substrate is attached to this

pad using conductive die attach material. There is no

electrical or mechanical requirement to solder this pad.

However, if it is soldered, the solder land should remain

floating or be connected to GND.

Fig 6. Pin configuration DHVQFN20

5.2 Pin description

Table 2.

Symbol

1

11

D[0:7]

Q[0:7]

10

20

Pin description

Pin

OE

CP

3, 4, 7, 8, 13, 14, 17, 18

2, 5, 6, 9, 12, 15, 16, 19

GND

VCC

Description

output enable input (active LOW)

clock input (LOW to HIGH, edge-triggered)

data input

3-state flip-flop output

ground (0 V)

supply voltage

74LVC374A_Q100

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 22 November 2012

© NXP B.V. 2012. All rights reserved.

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