<PAL>
LC7442, 7442E
Note: CLK = 640 fH = 10.00 MHz
Memory Read Range
Sub-Screen Display Position (for 4 corner display)
<NTSC>
<PAL>
When the display fine adjustment register (RVAJ1, 0, RHAJ1, 0) is 0000.
N/P register
MUL register H
L
VPH
H
L
48H 43H
43H 48H
VPL
H
L
198H 158H
158H 198H
No. 4412-17/22