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LTC1417IGN(RevA) Ver la hoja de datos (PDF) - Linear Technology

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LTC1417IGN Datasheet PDF : 32 Pages
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LTC1417
APPLICATIONS INFORMATION
Serial Data Output After a Conversion
Using an Internal Conversion Clock and an External Data
Clock. In this mode, data is output after the end of each
conversion and before the next conversion is started
(Figure 19). The internal clock is used as the conversion
clock and an external clock is used for the SCLK. This
mode is useful in applications where the processor acts as
a serial bus master device. This mode is SPI and
MICROWIRETM compatible. It also allows operation when
the SCLK frequency is very low (less than 30kHz). To
select the internal conversion clock, tie EXTCLKIN high.
The external SCLK is applied to SCLK. RD can be used to
gate the external SCLK, such that data will clock only after
RD goes low and to three-state DOUT after data transfer. If
more than 16 SCLKs are provided, more zeros will be filled
in after the data word indefinitely.
MICROWIRE is a trademark of National Semiconductor Corporation.
13
CONVST
CONVST
14
BUSY
12
RD
LTC1417
7
SCLK
9
DOUT
INT
C0
µP OR DSP
SCK
MISO
EXTCLKIN = 5
t2
CONVST
t3
BUSY
HOLD
RD
SCLK
DOUT
(SAMPLE N)
Hi-Z
tCONV
t10
t6
t5
SAMPLE
t9
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
t7
D13 12 11 10 9 8 7 6 5 4 3 2 1 0
DATA N
FILL
ZEROS
t8
Hi-Z
1417 F19
SCLK
DOUT
tLSCLK
VIL
t11
t12
D13
tHSCLK
D12
VOH
D11
VOL
CAPTURE ON CAPTURE ON
RISING CLOCK FALLING CLOCK
Figure 19. Internal Conversion Clock Selected. Data Transferred After Conversion
Using an External SCLK. BUSYIndicates End of Conversion
sn1417 1417fas
21

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