MST705-LF Ver la hoja de datos (PDF) - Mstar Semiconductor

Número de pieza

componentes Descripción

fabricante

MST705-LF

Small Size LCD TV Processor with Video Decoder

Mstar Semiconductor 

MST705

Small Size LCD TV Processor with Video Decoder

Preliminary Data Sheet Version 0.1

Scaler Register (Bank=00, Registers 01h ~ 9Fh)

Index Name

Bits Description

ISSM

2 Input Sync Sample Mode.

0: Normal.

1: Glitch-removal.

MVD_SEL

1:0 MVD mode Select

0: CVBS.

1: S-Video.

2: YCbCr.

3: RGB.

05h

SPRVST_L

7:0 Default : 0x10

Access : R/W, DB

SPRVST[7:0]

7:0 Image vertical sample start point, count by input HSYNC (lower 8

bits).

06h

SPRVST_H

7:0 Default : 0x00

Access : R/W, DB

-

7:3 Reserved.

Mstar Confidential SPRVST[10:8]

2:0 Image vertical sample start point, count by input HSYNC (higher 3

bits).

07h

SPRHST_L

7:0 Default : 0x01

Access : R/W, DB

for 深圳市江启科技有限公司 SPRHST[7:0]

7:0 Image horizontal sample start point, count by input dot clock

(higher 8 bits).

Internal Use Only 08h

SPRHST_H

-

7:0 Default : 0x00

7:3 Reserved.

Access : R/W, DB

SPRGST[10:8]

2:0 Image horizontal sample start point, count by input dot clock

(lower 3 bits).

09h

SPRVDC_L

7:0 Default : 0x10

Access : R/W, DB

SPRVDC[7:0]

7:0 Image vertical resolution (vertical display enable area count by

line; lower 8 bits).

0Ah

SPRVDC_H

7:0 Default: 0x00

Access : R/W

-

7:3 Reserved.

SPRVDC[10:8]

2:0 Image vertical resolution (vertical display enable area count by

line; higher 3 bits).

0Bh

SPRHDC_L

7:0 Default : 0x10

Access : R/W

SPRHDC[7:0]

7:0 Image horizontal resolution (horizontal display enable area count

by pixel; lower 8 bits).

0Ch

SPRHDC_L

7:0 Default : 0x00

Access : R/W

-

7:3 Reserved.

SPRHDC[10:8]

2:0 Image horizontal resolution (horizontal display enable area count

by pixel; higher 3 bits).

- 14 -

Copyright © 2010 MStar Semiconductor, Inc. All rights reserved.

11/2/2010

Share Link: