MT46V16M16BG-75 Ver la hoja de datos (PDF) - Micron Technology
Número de pieza
componentes Descripción
fabricante
MT46V16M16BG-75 Datasheet PDF : 80 Pages
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256Mb: x4, x8, x16
DDR SDRAM
CK#
CK
CKE
COMMAND4
x4: A0-A9, A11
x8: A0-A9
x16: A0-A8
x4: A12
x8: A11, A12
x16: A9, A11, A12
A10
BA0, BA1
DQS
DQ1
Figure 51: Bank Write - With Auto Precharge
T0
T1
T2
T3 T3n T4 T4n T5 T5n T6
tIS tIH
tCK
tCH tCL
tIS tIH
NOP5
ACT
tIS tIH
RA
NOP5
WRITE2
Col n
NOP5
NOP5
NOP5
RA
RA
tIS tIH
Bank x
tRCD
tRAS
3
tIS tIH
Bank x
tDQSS (NOM)
tWPRES tWPRE
7
DI
b
tDQSL tDQSH tWPST
T7
NOP5
tWR
T8
NOP5
tRP
DM
tDS
tDH
DON’T CARE
TRANSITIONING DATA
NOTE:
1. DIn = data-out from column n; subsequent elements are provided in the programmed order.
2. Burst length = 4 in the case shown.
3. Enable auto precharge.
4. ACT = ACTIVE;, RA = Row Address; and BA = Bank Address.
5. NOP commands are shown for ease of illustration; other commands may be valid at these times.
6. See Figure 43, Data Input Timing, on page 68, for detailed DQ timing.
7. Although not required by the Micron device, JEDEC specifies that DQS be a valid HIGH, LOW or some point on a valid
transition on or before this clock edge (T3n).
SYMBOL
tCH
tCL
tCK (2.5)
tCK (2)
tDH
tDS
tDQSH
tDQSL
tDQSS
tDSS
-6/6T/6T
MIN MAX
0.45 0.55
0.45 0.55
6
13
7.5 13
0.45
0.45
0.35
0.35
0.75 1.25
0.2
-75E/75Z
MIN MAX
0.45 0.55
0.45 0.55
7.5 13
7.5 13
0.5
0.5
0.35
0.35
0.75 1.25
0.2
-75
MIN MAX
0.45 0.55
0.45 0.55
7.5
13
10
13
0.5
0.5
0.35
0.35
0.75 1.25
0.2
UNITS
tCK
tCK
ns
ns
ns
ns
tCK
tCK
tCK
tCK
SYMBOL
tDSH
tIHS
tISS
tRAS
tRCD
tRP
tWPRE
tWPRES
tWPST
tWR
-6/6T/6T
MIN MAX
0.2
0.8
0.8
42 70,000
18
18
0.25
0
0.4 0.6
15
-75E/75Z
MIN MAX
0.2
1
1
40 120,000
15
15
0.25
0
0.4 0.6
15
-75
MIN
0.2
1
MAX
UNITS
tCK
ns
1
ns
40 120,000 ns
20
ns
20
ns
0.25
tCK
0
ns
0.4
0.6
tCK
15
ns
09005aef8076894f
256MBDDRx4x8x16_2.fm - Rev. F 6/03 EN
76
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2003 Micron Technology, Inc.
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