NXP Semiconductors
74ABT623
Octal transceiver with dual enable; non-inverting; 3-state
VI 90 %
tW
negative
pulse
VM
10 %
0V
tf
tr
VI
positive
pulse
90 %
VM
10 %
0V
tW
90 %
VM
tr
tf
VM
10 %
001aac221
a. Input pulse definition
Fig 9.
Test data and VEXT levels are given in Table 9.
CL = Load capacitance including jig and probe capacitance.
Test circuit for measuring switching times
VI
G
VCC
VO
DUT
RT
VEXT
RL
CL
RL
b. Test circuit
mna616
Table 9.
Input
tr, tf
≤ 2.5 ns
Test data
Load
CL
50 pF
RL
500 Ω
VEXT
tPHL, tPLH
open
tPZH, tPHZ
open
tPZL, tPLZ
7.0 V
74ABT623_3
Product data sheet
Rev. 03 — 22 October 2009
© NXP B.V. 2009. All rights reserved.
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