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MAX8778

Dual Quick-PWM Step-Down Controller with Low-Power LDO, RTC Regulator

Maxim Integrated 

Dual Quick-PWM Step-Down Controller

with Low-Power LDO, RTC Regulator

Free-Running Constant-On-Time PWM

Controller with Input Feed-Forward

The Quick-PWM control architecture is a pseudo-fixed-

frequency, constant on-time, current-mode regulator

with voltage feed-forward. This architecture relies on

the output filter capacitor’s ESR to act as a current-

sense resistor, so the feedback ripple voltage provides

the PWM ramp signal. The control algorithm is simple:

the high-side switch on-time is determined solely by a

one-shot whose pulse width is inversely proportional to

input voltage and directly proportional to output volt-

age. Another one-shot sets a minimum off-time (400ns

typ). The on-time one-shot is triggered if the error com-

parator is low, the low-side switch current is below the

valley current-limit threshold, and the minimum off-time

one-shot has timed out.

On-Time One-Shot

The heart of the PWM core is the one-shot that sets the

high-side switch on-time. This fast, low-jitter, adjustable

one-shot includes circuitry that varies the on-time in

response to battery and output voltage. The high-side

switch on-time is inversely proportional to the battery

voltage as sensed by the IN input, and proportional to

the output voltage:

On-Time = K (VOUT/VIN)

where K (switching period) is set by the tri-level TON

input (see the Pin Description section). High-frequency

(400kHz/500kHz) operation optimizes the application

for the smallest component size, trading off efficiency

due to higher switching losses. This might be accept-

able in ultra-portable devices where the load currents

are lower and the controller is powered from a lower

voltage supply. Low-frequency (200kHz/300kHz) oper-

ation offers the best overall efficiency at the expense of

component size and board space.

For continuous conduction operation, the actual switching

frequency can be estimated by:

fSW

=

VOUT + VDROP1

tON(VIN + VDROP1 − VDROP2)

where VDROP1 is the sum of the parasitic voltage drops

in the inductor discharge path, including synchronous

rectifier, inductor, and PCB resistances; VDROP2 is the

sum of the voltage drops in the charging path, includ-

ing the high-side switch, inductor, and PCB resis-

tances; and tON is the on-time calculated by the

MAX17020.

Table 3. Approximate K-Factor Errors

SWITCHING

REGULATOR

TON SETTING

(kHz)

SMPS 1

200kHz

TON = VCC

400kHz

TON = REF or GND

SMPS 2

300kHz

TON = REF or VCC

500kHz

TON = GND

TYPICAL K-FACTOR

(µs)

5.0

2.5

3.3

2.0

K-FACTOR ERROR

(%)

COMMENTS

±10

Use for absolute best efficiency.

±12.5

±10

±12.5

Useful in 3-cell systems for lighter loads

than the CPU core or where size is key.

Considered mainstream by current

standards.

Good operating point for compound buck

designs or desktop circuits.

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