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MAX5402

Digital Potentiometer ICs 256-Tap Low-Drift

Maxim Integrated 

256-Tap, µPoT, Low-Drift,

Digital Potentiometer

ELECTRICAL CHARACTERISTICS (continued)

(VDD = +5V, VH = VDD, VL = 0, TA = TMIN to TMAX. Typical values are at VDD = +5V, TA = +25°C, unless otherwise noted.)

PARAMETER

SCLK Pulse Width Low

CS Fall to SCLK Rise Setup Time

SCLK Rise to CS Rise Hold Time

DIN Setup Time

DIN Hold Time

SCLK Rise to CS Fall Delay

CS Rise to SCLK Rise Hold

CS Pulse Width High

POWER SUPPLIES

Supply Voltage

Supply Current

SYMBOL

tCL

tCSS

tCSH

tDS

tDH

tCS0

tCS1

tCSW

VDD

IDD

CS = SCLK =

DIN = VDD

CONDITIONS

VDD = +5V

VDD = +2.7V

MIN TYP MAX

40

40

0

40

0

10

40

100

2.7

5.5

0.8

5

0.1

UNITS

ns

ns

ns

ns

ns

ns

ns

ns

V

µA

µA

Note 1: Linearity is defined in terms of the H-to-L code-dependent resistance.

Note 2: The DNL and INL are measured with the potentiometer configured as a voltage-divider with H = VDD and L = 0. The wiper

terminal is unloaded and measured with an ideal voltmeter.

Note 3: The DNL and INL are measured with the potentiometer configured as a variable resistor. H is unconnected and L = 0. The

wiper terminal is driven with a source current of 200µA at VDD = +3V and 400µA at VDD = +5V.

Note 4: The wiper resistance is the worst value measured, injecting a current, IW = VDD/RHL into terminal W.

Note 5: Digital timing is guaranteed by design.

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