CY7C1462AV25 Ver la hoja de datos (PDF) - Cypress Semiconductor
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CY7C1462AV25
Cypress Semiconductor
CY7C1462AV25 Datasheet PDF : 27 Pages
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CY7C1460AV25
CY7C1462AV25
CY7C1464AV25
Partial Write Cycle Description[1, 2, 3, 8]
Function (CY7C1460AV25)
Read
Write – No bytes written
Write Byte a – (DQa and DQPa)
Write Byte b – (DQb and DQPb)
Write Bytes b, a
Write Byte c – (DQc and DQPc)
Write Bytes c, a
Write Bytes c, b
Write Bytes c, b, a
Write Byte d – (DQd and DQPd)
Write Bytes d, a
Write Bytes d, b
Write Bytes d, b, a
Write Bytes d, c
Write Bytes d, c, a
Write Bytes d, c, b
Write All Bytes
WE
BWd
BWc
BWb
BWa
H
X
X
X
X
L
H
H
H
H
L
H
H
H
L
L
H
H
L
H
L
H
H
L
L
L
H
L
H
H
L
H
L
H
L
L
H
LL
L
H
L
H
L
L
L
L
L
H
H
H
L
L
H
H
L
L
L
H
L
H
L
L
H
L
L
L
L
L
H
H
L
L
L
H
L
L
L
L
L
H
L
L
L
L
L
Function (CY7C1462AV25)
Read
Write – No Bytes Written
Write Byte a – (DQa and DQPa)
Write Byte b – (DQb and DQPb)
Write Both Bytes
Function (CY7C1464AV25)
Read
Write – No Bytes Written
Write Byte X − (DQx and DQPx)
Write All Bytes
WE
BWb
H
X
L
H
L
H
L
L
L
L
WE
H
L
L
L
BWa
X
H
L
H
L
BWx
X
H
L
All BW = L
Note:
8. Table only lists a partial listing of the byte write combinations. Any combination of BWX is valid. Appropriate write will be done based on which byte write is active.
Document #: 38-05354 Rev. *D
Page 9 of 27
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