Timing Diagram
n=0
1
2
3
4
5
6
7
CLOCK
SERIAL-IN
LATCH
ENABLE
OUT0
OUT1
OUT3
TB62725P/F/FN
3.3 V
0V
3.3 V
0V
3.3 V
0V
3.3 V
0V
ON
OFF
ON
OFF
ON
OFF
OUT7
SERIAL-OUT
ON
OFF
3.3 V
0V
Warning: Latch circuit is leveled-latch circuit. Be careful because it is not triggered-latch circuit.
Note 2: The latches circuit holds data by pulling the LATCH terminal Low.
And, when LATCH terminal is a “H” level, latch circuit doesn’t hold data, and it passes from the input to the
output.
When ENABLE terminal is a “L” level, output terminal OUT0 ~ OUT7 respond to the data, and on & off
does.
And, when ENABLE terminal is a “H” level, it offs with the output terminal regardless of the data.
3
2002-01-31