Philips Semiconductors
Hex D-type flip-flop
Product specification
HEF40174B
MSI
Dynamic power
dissipation per
package (P)
VDD
V
TYPICAL FORMULA FOR P(µW)
5
3500 fi + ∑ (foCL) × VDD2
where
10
16 000 fi + ∑ (foCL) × VDD2
fi = input freq. (MHz)
15
42 000 fi + ∑ (foCL) × VDD2
fo = output freq. (MHz)
CL = load capacitance (pF)
∑ (foCL) = sum of outputs
VDD = supply voltage (V)
Fig.4 Waveforms showing minimum pulse widths for CP and MR, MR to CP recovery time, and set-up time and
hold time for Dn to CP. Set-up and hold times are shown as positive values but may be specified as
negative values.
APPLICATION INFORMATION
Some examples of applications for the HEF40174B are:
• Shift registers
• Buffer/storage register
• Pattern generator
January 1995
5