ML6430 Ver la hoja de datos (PDF) - Micro Linear Corporation

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fabricante

ML6430

Genlocking Sync Generator with Digital Audio Clock for NTSC, PAL & VGA

Micro Linear Corporation 

ML6430/ML6431

REGISTER DATA

BIT

DESCRIPTION

VALUE RANGE

7

0 DisAutoVCR

0=Auto VCR Detect ON

1=Disable Auto VCR Detect

7

1 Test 1

For test mode only:

No user programmable features. Set to 0

7

2 Ext 54

Clock IN

Low = Pin 3 is SLEEP

High = Pin 3 is Ext 54MHz Clock

7

3 PHERROUT or AUDIOCLK

Low=Pin 16 is Audio CLK, Pin 3 is

SLEEP

High=Pin 16 is PHERROUT, Pin 3

is RESET

8

0 FAud0

AudioClk Freq Bit 0

00 = 48kHz, 01 = 44.1kHz, 10 = 32kHz

8

1 FAud1

AudioClk Freq Bit 1

8

2 VCR

Enable VCR Mode

High = Enabled, Low = Disabled

8

3 SLEEP

Power Down Mode

High = Power Down, Low = Normal

9

0 Thresh0 Select ‘Out of Lock’ Threshold 00 = 2.5 Pixels 10 = 1.0 Pixels

9

1 Thresh1

01 = 2.5 Pixels 11 = 4.0 Pixels

9

2 VGA

Enable VGA Mode

High = Enabled, Low = Disabled

9

3 Div4

Enable /4 on M/N Loop

High = Enabled, Low = Disabled

10

0 FStd0

Freq Std Sel Bit 0

000 = NTSC SqPix 011 = PAL 601

10

1 FStd1

Freq Std Sel Bit 1

001 = PAL Sq Pix 100 = NTSC 4Fsc

10

2 FStd2

Freq Std Sel Bit 2

010 = NTSC 601

10

3 PALXTAL Enable PAL Ref Freq

High = Enabled, Low = Disabled

Table 11. ML6431 Register Map (Continued)

BIT CODE

RANGE

0 or 1

0

0 or 1

0 or 1

00 to 10

00 to 11

0 or 1

0 or 1

000 to 100

0 or 1

21

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