TEKTRONIX
GIGABERT 1400
CLK DATA
PATTERN 223-1
PIN CONNECTIONS
GENNUM
TEST BOARD
DI
SDO
DI
Fig. 1 Jitter Measurement Test Setup
TEKTRONIX CH-1 TRIG
CSA803
4 3 2 1 28 27 26
DDI 5
25 SDO
DDI 6
24 SDO
VEE 7
VEE 8
VCC1 9
GS9035A
TOP VIEW
23 SCO
22 SCO
21 SSO
AUTO/MAN 10
20 SS1
VEE 11
19 SS2
12 13 14 15 16 17 18
PIN DESCRIPTIONS
NUMBER SYMBOL TYPE
DESCRIPTION
1,7,8,11,27
2
VEE
COSC
I Most negative power supply connection.
I Timing control capacitor for internal system clock.
3
LOCK
O Lock indication. When HIGH, the GS9035A is locked. LOCK is an open collector output and
requires an external 10k pullup resistor.
4
SMPTE
I SMPTE/Other rate select.
5, 6
DDI/DDI
I Digital data input (Differential ECL/PECL).
9
VCC1
I Most positive power supply connection.
10
AUTO/MAN
I Auto or Manual mode select. TTL/CMOS compatible input.
12
LF+
I Loop filter component connection.
13
LFS
I Loop filter component connection.
14
LF-
I Loop filter component connection.
15
RVCO_RTN
I
RVCO return.
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