LT1640LCS8 Ver la hoja de datos (PDF) - Linear Technology
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LT1640LCS8 Datasheet PDF : 16 Pages
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LT1640L/LT1640H
APPLICATIONS INFORMATION
The new threshold voltage when the input moves from low
to high is:
VUV,LH
=
VUVH
R2
•
R3
+ R1
R2
•
•
R3
R3
+
R1
•
R2
where VUVH is typically 1.243V.
The new threshold voltage when the input moves from
high to low is:
VUV,HL
=
VUVL
R2
•
R3
+ R1•
R2 •
R3
R3
+
R1• R2
–
VGATE
•
R1
R3
where VUVL is typically 1.223V.
The new hysteresis value will be:
VHYS
=
VUVHY
R2
•
R3
+ R1•
R2 •
R3
R3
+
R1 •
R2
+
VGATE
•
R1
R3
With R1 = 562k, R2 = 16.9k and R3 = 1.62M, VGATE = 13.5V
and VUVHY = 20mV, the undervoltage threshold will be 43V
(from low to high) and 37.6V (from high to low). The
hysteresis is 5.4V. A separate resistor divider should be
used to set the overvoltage threshold given by:
VOV
=
VOVH
R4 + R5
R5
With R4 = 506k, R5 = 8.87k and VOVH = 1.223V, the
overvoltage threshold will be 71V.
PWRGD/PWRGD Output
The PWRGD/PWRGD output can be used to directly en-
able a power module when the input voltage to the module
is within tolerance. The LT1640L has a PWRGD output for
modules with an active low enable input, and the LT1640H
has a PWRGD output for modules with an active high
enable input.
When the DRAIN voltage of the LT1640H is high with
respect to VEE (Figure 11), the internal transistor Q3 is
turned off and R7 and Q2 clamp the PWRGD pin one diode
drop (≈ 0.7V) above the DRAIN pin. Transistor Q2 sinks
the module’s pull-up current and the module turns off.
When the DRAIN voltage drops below VPG, Q3 will turn on,
shorting the bottom of R7 to DRAIN and turning Q2 off.
The pull-up current in the module then flows through R7,
pulling the PWRGD pin high and enabling the module.
12
(SHORT PIN)
GND
GND
LT1640H
R4
3
UV
+
R5
2
+– VPG
OV
–
R6
VEE SENSE
4
5
*
8
VDD
PWRGD 1
R7
+
6.5k
Q2
Q3
VEE DRAIN 7 2× 1N4148
GATE
6
R3
C1 R2
C2
ACTIVE HIGH
ENABLE MODULE
VIN+ VOUT+
ON/OFF
C3
VIN– VOUT–
3
R1
4
– 48V
1
2
Q1
* DIODES INC. SMAT70A
1640 F11
Figure 11. Active High Enable Module
1640lhfb
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