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Intel® Core™2 Duo Mobile Processor for Intel® Centrino® Duo Mobile Processor Technology

Intel 

Low Power Features

Figure 2. Package Low Power States

Normal

STPCLK# asserted

STPCLK# de-asserted

Stop

Grant

SLP# asserted

SLP# de-asserted

Sleep

DPSLP# asserted

Deep

Sleep

DPSLP# de-asserted

DPRSTP# asserted

Deeper

Sleep†

DPRSTP# de-asserted

Snoop Snoop

serviced occurs

Stop

Grant

Snoop

† — Deeper Sleep includes the Deeper Sleep state and Intel Enhanced Deeper Sleep state.

Table 1.

2.1.1

2.1.1.1

2.1.1.2

Coordination of Core Low Power States at the Package Level

Package State

Core1 State

Core0 State

C0

C1/AutoHALT/

MWAIT

C2

C3

C0

Normal

Normal

Normal

Normal

C1/Auto

HALT/

MWAIT

Normal

Normal

Normal

Normal

C2

C3

Normal

Normal

Normal

Normal

Stop-Grant

Stop-Grant

Stop-Grant

Deep Sleep

C4

Normal

Normal

Stop-Grant Deep Sleep

C4

Normal

Normal

Stop-Grant

Deep Sleep

Deeper Sleep/

Intel®

Enhanced

Deeper Sleep

Core Low Power State Descriptions

Core C0 State

This is the normal operating state for cores in the processor.

Core C1/AutoHALT Powerdown State

C1/AutoHALT is a low power state entered when a core executes the HALT instruction.

The processor core will transition to the C0 state upon occurrence of SMI#, INIT#,

LINT[1:0] (NMI, INTR), or FSB interrupt messages. RESET# will cause the processor to

immediately initialize itself.

A System Management Interrupt (SMI) handler will return execution to either Normal

state or the AutoHALT Powerdown state. See the Intel® 64 and IA-32 Intel®

Architectures Software Developer's Manual, Volume 3A/3B: System Programmer's

Guide for more information.

The system can generate a STPCLK# while the processor is in the AutoHALT

Powerdown state. When the system deasserts the STPCLK# interrupt, the processor

will return execution to the HALT state.

Datasheet

13

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