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L7400

Intel® Core™2 Duo Mobile Processor for Intel® Centrino® Duo Mobile Processor Technology

Intel 

Low Power Features

Figure 1. Core Low Power States

C1/

MWAIT

Stop

Grant

STPCLK#

asserted

STPCLK#

de-asserted

STPCLK#

STPCLK#

de-asserted

STPCLK# asserted

de-asserted

STPCLK#

asserted

Core state

break

HLT instruction

C1/Auto

Halt

C4† ‡

MWAIT(C1)

Halt break

Core State

break

C0

P_LVL2 or

MWAIT(C2)

P_LVL4 or

MWAIT(C4)

Core state

break

Core

state

break

P_LVL3 or

MWAIT(C3)

C2†

C3†

halt break = A20M# transition, INIT#, INTR, NMI, PREQ#, RESET#, SMI#, or APIC interrupt

core state break = (halt break OR Monitor event) AND STPCLK# high (not asserted)

† — STPCLK# assertion and de-assertion have no effect if a core is in C2, C3, or C4.

‡ — Core C4 state includes the Intel Enhanced Deeper Sleep state.

12

Datasheet

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