ADG619(RevA) Ver la hoja de datos (PDF) - Analog Devices

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ADG619
(Rev.:RevA)

CMOS ±
5 V/+5 V 4Ω Single SPDT Switches

Analog Devices 

ADG619/ADG620

SINGLE SUPPLY1 (VDD = +5 V ؎ 10%, VSS = 0 V, GND = 0 V. All specifications –40؇C to +85؇C, unless otherwise noted.)

Parameter

ANALOG SWITCH

Analog Signal Range

On Resistance (RON)

On Resistance Match between

Channels (∆RON)

On Resistance Flatness (RFLAT (ON))

LEAKAGE CURRENTS

Source OFF Leakage IS (OFF)

Channel ON Leakage ID, IS (ON)

DIGITAL INPUTS

Input High Voltage, VINH

Input Low Voltage, VINL

Input Current

IINL or IINH

CIN, Digital Input Capacitance

DYNAMIC CHARACTERISTICS2

ADG619

tON

tOFF

Break-Before-Make Time Delay, tBBM

ADG620

tON

tOFF

Make-Before-Break Time Delay, tMBB

Charge Injection

B Version

+25؇C –40؇C to +85؇C

0 V to VDD

7

10

12.5

0.8

1.1

1.3

0.5

0.5

1

± 0.01

± 0.25 ± 1

± 0.01

± 0.25 ± 1

2.4

0.8

0.005

± 0.1

2

120

220

280

50

75

110

70

10

50

85

110

210

340

420

170

10

6

Off Isolation

–67

Channel-to-Channel Crosstalk

–67

Bandwidth –3 dB

CS (OFF)

CD, CS (ON)

POWER REQUIREMENTS

IDD

190

25

95

0.001

1.0

NOTES

1Temperature range is as follows: B Version, –40°C to +85°C.

2Guaranteed by design, not subject to production test.

Specifications subject to change without notice.

Unit

V

Ω typ

Ω max

Ω typ

Ω max

Ω typ

Ω max

nA typ

nA max

nA typ

nA max

V min

V max

µA typ

µA max

pF typ

Test Conditions/Comments

VDD = 4.5 V, VSS = 0 V

VS = 0 V to 4.5 V, IS = –10 mA;

Test Circuit 1

VS = 0 V to 4.5 V, IS = –10 mA

VS = 1.5 V to 3.3 V, IS = –10 mA

VDD = 5.5 V

VS = 1 V/4.5 V, VD = 4.5 V/1 V;

Test Circuit 2

VS = VD = 1 V/4.5 V;

Test Circuit 3

VIN = VINL or VINH

ns typ

ns max

ns typ

ns max

ns typ

ns min

ns typ

ns max

ns typ

ns max

ns typ

ns min

pC typ

dB typ

dB typ

MHz typ

pF typ

pF typ

µA typ

µA max

RL = 300 Ω, CL = 35 pF

VS = 3.3 V; Test Circuit 4

RL = 300 Ω, CL = 35 pF

VS = 3.3 V; Test Circuit 4

RL = 300 Ω, CL = 35 pF,

VS1 = VS2 = 3.3 V; Test Circuit 5

RL = 300 Ω, CL = 35 pF

VS = 3.3 V; Test Circuit 4

RL = 300 Ω, CL = 35 pF

VS = 3.3 V; Test Circuit 4

RL = 300 Ω, CL = 35 pF

VS = 3.3 V; Test Circuit 6

VS = 0 V, RS = 0 Ω, CL = 1 nF;

Test Circuit 7

RL = 50 Ω, CL = 5 pF, f = 1 MHz;

Test Circuit 8

RL = 50 Ω, CL = 5 pF, f = 1 MHz;

Test Circuit 10

RL = 50 Ω, CL = 5 pF; Test Circuit 9

f = 1 MHz

f = 1 MHz

VDD = 5.5 V

Digital Inputs = 0 V or 5.5 V

REV. A

–3–

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