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74AHC32BQ-Q100 Datasheet PDF : 15 Pages
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74AHC32-Q100; 74AHCT32-Q100
Quad 2-input OR gate
Rev. 1 — 26 March 2013
Product data sheet
1. General description
The 74AHC32-Q100; 74AHCT32-Q100 is a high-speed Si-gate CMOS device and is pin
compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with
JEDEC standard No. 7-A.
The 74AHC32-Q100; 74AHCT32-Q100 provides the 2-input OR function.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from 40 C to +85 C and from 40 C to +125 C
Balanced propagation delays
All inputs have Schmitt-trigger actions
Inputs accept voltages higher than VCC
Input levels:
For 74AHC32-Q100: CMOS level
For 74AHCT32-Q100: TTL level
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )
Multiple package options
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