WT62P1-N42 Ver la hoja de datos (PDF) - Weltrend Semiconductor

Número de pieza

componentes Descripción

fabricante

WT62P1-N42

Digital monitor controller with USB function

Weltrend Semiconductor 

WT62P1

Data Sheet Rev. 1.01

Free-running sync signal and self-test pattern

The self-generated free run sync signals are output from HOUT and VOUT pins when ENFREE bit is set.

Four kinds of standard VESA timings are selected by FREE1 and FREE0 bits.

Self-test pattern signal is output from PAT pin when ENPAT bit is set. PAT1 and PAT0 bits select

different self-test pattern.

PAT1 = 0 , PAT0 = 0

PAT1 = 0 , PAT0 = 1

PAT1 = 1 , PAT0 = 0

Fig.7 Test Pattern

PAT1 = 1 , PAT0 = 1

FREE2,1,0 bit value

X00

FH Hor frequency 31.496KHz

FV Ver frequency

59.993Hz

THT Hor total time

TVT Ver total time

THS H sync time

THB H Back porch +

H Left border

31.75us

16.669ms

3.833us

2 us

THF H Front porch +

H Right border

0.708us

TVS V sync time

TVB V Back porch +

V Top border

2 x THT

33 X THT

TVF V Front porch + 11 x THT

V Bottom border

TVIDEO Video pulse width 41.67ns

X01

48KHz

72.072Hz

20.833us

13.875ms

2.417us

1.417us

1.125us

6 x THT

23 x THT

38 x THT

41.67ns

010

63.83KHz

59.878Hz

15.667us

16.7ms

1us

2.417us

0.542us

3 x THT

38 x THT

3 x THT

41.67ns

011

81.25KHz

64.865Hz

12.333us

15.417ms

1.083us

1.833us

110

111

90.909KHz 106.195KHz

84.8Hz 84.96Hz

11us

9.417us

11.792ms 11.771ms

1us

0.833us

1.583us 1.417us

0.375us 0.375us 0.292us

3 x THT

46 x THT

2 x THT

3 x THT

44 x THT

2 x THT

3 x THT

46 x THT

2 x THT

41.67ns 41.67ns 41.67ns

THT

THS

HOUT

VOUT

HOUT

TVS

THT

TVT

THS

PAT

THB

THB

THF

TVEDIO

Fig.8 Free-running sync signal and test pattern timing

Weltrend Semiconductor, Inc.

Page 14

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