WM8772EDS Ver la hoja de datos (PDF) - Wolfson Microelectronics plc
Número de pieza
componentes Descripción
fabricante
WM8772EDS Datasheet PDF : 70 Pages
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WM8772EDS – 28 PIN SSOP
Production Data
PAGES 12 TO 36 DESCRIBE THE OPERATION OF THE WM8772EDS 28 PIN
SSOP PRODUCT VARIANT.
PAGES 37 TO 66 DESCRIBE THE OPERATION OF THE WM8772EFT 32 PIN
TQFP PRODUCT VARIANT.
WM8772EDS – 28 PIN SSOP
MASTER CLOCK TIMING
MCLK
t MCLKL
tMCLKH
t MCLKY
Figure 13 ADC and DAC Master Clock Timing Requirements
Test Conditions
AVDD, VREFP = 5V, DVDD = 3.3V, AGND, VREFN = 0V, AGND, DGND = 0V, TA = +25oC, fs = 48kHz, DACMCLK and
ADCMCLK = 256fs unless otherwise stated.
PARAMETER
SYMBOL
System Clock Timing Information
MCLK System clock pulse width
high
tMCLKH
MCLK System clock pulse width
low
tMCLKL
MCLK System clock cycle time
tMCLKY
MCLK Duty cycle
Table 2 Master Clock Timing Requirements
TEST CONDITIONS
MIN
11
11
28
40:60
TYP
MAX
UNIT
ns
ns
ns
60:40
DIGITAL AUDIO INTERFACE – MASTER MODE
BCLK
LRC
WM8772
CODEC
DOUT
DIN1/2/3
3
DSP/
ENCODER/
DECODER
Figure 14 Audio Interface - Master Mode
w
PD Rev 4.1 October 2004
16
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