UPD75104AGC Ver la hoja de datos (PDF) - NEC => Renesas Technology

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UPD75104AGC

4-BIT SINGLE-CHIP MICROCOMPUTER

NEC => Renesas Technology 

µPD75104A, 75108A

FUNCTIONAL OUTLINE

Item

Number of Basic Instructions

Minimum Instruction

Execution Time

Internal Memory

ROM

RAM

General-Purpose Register

Accumulator

I/O Port

Timer/Counter

Serial Interface

Vector Interrupt

Test Input

Standby

Instruction Set

Others

Package

Specifications

43

Changeable in three steps: 0.95 µs, 1.91 µs, and 15.3 µs at 4.19 MHz

8064 × 8 bits (µPD75108A), 4096 × 8 bits (µPD75104A)

512 × 4 bits (µPD75108A), 320 × 4 bits (µPD75104A)

(4 bits × 8 ) × 4 banks or (8 bis x 4 ) x 4 banks

Three accumulators selectable according to the bit length of manipulated data:

• 1-bit accumulator (CY), 4-bit accumulator (A), and 8-bit accumulator (XA)

58 port pins

• CMOS input pins (Pull-up resistor can be conneced to 4 out of 10 pins

in bit units.): 10

• CMOS I/O pins (can directly drive LEDs. Pull-up resistors can be connected to

24 out of 32 pins in bit units.): 32

• Medium voltage N-ch open-drain I/O pins: 12

(can directly drive LEDs. Pull-up resistors can be connected in bit units.)

• Comparator input pins (4-bit accuracy): 4

• 8-bit timer/event counter × 2

• 8-bit basic interval timer (can be used as watchdog timer)

• 8 bits

• LSB first/MSB first mode selectable

• Two transfer modes (transfer/reception and reception only modes)

External: 3, Internal: 4

External: 2

• STOP and HALT modes

• Various bit manipulation instructions (set, reset, test, Boolean operation)

• 8-bit data transfer, compare, operation, increment, and decrement

• 1-byte relative branch instructions

• GETI instruction constituting 2 or 3-byte instruction with 1 byte

• Power-ON reset circuit (mask option)

• Bit manipulation memory (bit sequential buffer: 16 bits)

• 64-pin plastic QFP ( 14 mm)

3

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