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TS4657

Single supply stereo digital audio line driver with 2.2 Vrms capless outputs

STMicroelectronics 

Application information

TS4657

Figure 50. Audio interface formats managed by the TS4657

16-bit Right justified data format: pin FORMAT1 = VIL, FORMAT2 = VIL

LRCLK

LEFT

RIGHT

SDAT

01

MSB

14 15

16-bit word left data

LSB

01

MSB

14 15

16-bit word right data LSB

BCLK

24-bit right-justified data format: pin FORMAT1 = VIH, FORMAT2 = VIL

LRCLK

SDAT

BCLK

LEFT

01

MSB

n-bit word left data

n-2 n-1

LSB

RIGHT

01

MSB

n-bit word right data

n-2 n-1

LSB

Up to 24-bit left-justified data format: pin FORMAT1 = VIL, FORMAT2 = VIH

LRCLK

LEFT

RIGHT

SDAT

01

MSB

n-bit word left data

n-2 n-1

LSB

01

MSB

n-bit word right data

n-2 n-1

LSB

BCLK

Up to 24-bit I²S data format: pin FORMAT1 = VIH, FORMAT2 = VIH

LRCLK

LEFT

RIGHT

SDAT

01

MSB

n-2 n-1

32-bit word left data

LSB

01

n-2 n-1

MSB 32-bit word right data LSB

BCLK

4.2

Power-management unit

The TS4657 utilizes a power-management unit to supply its internal structures.

A self-generated negative supply enables the drivers to be powered from positive and

negative supplies, therefore increasing the amplitude of the output signal. This internal

negative supply switches at a higher frequency than traditional architectures, derived from

the master clock MCLK. This structure uses an original design that enables one to suppress

the flying or floating capacitors. Therefore, only four small ceramic X5R 10V 1-µF

decoupling capacitors are necessary for VCCA/VCCD and VREGA/VREGD.

Furthermore, the self-generated negative supply allows the amplifier outputs to be centered

around zero, thus the bulky output coupling capacitors can be removed.

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