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LG1600KXH

Clock and Data Regenerator

Agere -> LSI Corporation 

Data Sheet

June 1999

LG1600KXH Clock and Data Regenerator

Theory of Operation (continued)

A more useful expression of the PLL characteristics is

the following*:

H(s)

=

ωb





1

+

s--1--τ-

-------------------------------------

s + ωb1 + s--1--τ-

The jitter transfer is now directly expressed in the phys-

ical loop gain pole product, ωb, and the loop filter time

constant, τ. Damping ratio, ς, and natural frequency, ωn,

simply relate to these two parameters as follows:

ς = 0.5 ωbτ

and

ωn = ωn ⁄ τ

For moderate damping, ς > 2.5 (ωbτ < 0.1), the –3 dB

bandwidth of the PLL can be approximated by the loop

gain pole product:

JBW ≈ ωb = KdRxKo

while the jitter peaking can be expressed in terms of

the product of PLL bandwidth and loop filter time con-

stant:

H(s) max ≈ 1 + -ω---1-b---τ- = 1 + -R----x2---C----1K-----d--K-----o

As the last two expressions make clear, the PLL band-

width is controlled by the value of the external resistor

(see Figure 8), while the peaking depends both on the

resistor value (quadratically) and total loop filter capac-

itance.

* Wolaver, D.H., Phase-Locked Loop Circuit Design, Prentice Hall,

1991.

1.2

1.0

0.8

0.6

0.4

0.2

0.0

0

10 °C

25 °C

70 °C

50

100

150

200

250

Rx (Ω)

3.6

3.0

2.4

1.8

1.2

0.6

0.0

0

10 °C

25 °C

70 °C

50

100

150

200

250

Rx (Ω)

A. LG1600KXH0622 (Cx = 0.15 µF)

B. LG1600KXH2488 (Cx = 0)

12-3231(F)r.3—12-3232(F)r.3

Figure 8. Jitter Bandwidth vs. External Resistor Value

Lucent Technologies Inc.

5

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