Philips Semiconductors
Multiple voltage regulator with switch
Preliminary specification
TDA3605Q
SYMBOL
PARAMETER
CONDITIONS
MIN.
Schmitt-trigger for enable input (regulator 1, regulator 3 and switch)
Vthr
rising voltage threshold
1.7
Vthf
falling voltage threshold
1.5
Vhys
hysteresis
IREG = ISW = 1 mA
0.1
ILI
input leakage current Ven = 5 V
1
Schmitt-trigger for reset buffer
Vthr
rising voltage threshold VP rising;
−
of regulator 2
IREG1 = 50 mA; note 3
Vthf
falling voltage threshold VP rising;
4.3
of regulator 2
IREG1 = 50 mA; note 3
Vhys
hysteresis
0.1
Schmitt-trigger for hold
Vthr
rising voltage threshold VP rising; note 3
−
of regulator 1
Vthf
falling voltage threshold VP rising; note 3
9.2
of regulator 1
Vhys
hysteresis
0.1
Reset and hold buffer
ILsink
LOW level sink current VRES/hold ≤ 0.8 V
2
ILO
output leakage current VP = 14.4 V;
−
VRES/hold = 5 V
tr
rise time
note 4
−
tf
fall time
note 4
−
Reset delay
Ich
charge current
2
Idch
discharge current
500
Vthr
rising voltage threshold
2.5
td
delay time
C = 47 nF; note 5
20
Regulator 1 (IREG1 = 5 mA)
VREG1(off)
VREG1
output voltage off
output voltage
∆VREG1
∆VREGL1
Iq
SVRR1
line regulation
load regulation
quiescent current
supply voltage ripple
rejection
−
1 mA ≤ IREG1 ≤ 600 mA 9.5
11 V ≤ VP ≤ 18 V
9.5
11 V ≤ VP ≤ 18 V
−
1 mA ≤ IREG1 ≤ 600 mA −
IR1 = 600 mA
−
fi = 3 kHz; Vi(p-p) = 2 V
60
VREGd1
IREGm1
drop-out voltage
current limit
IREG1 = 550 mA;
VP = 9.5 V; note 6
VREG1 > 8.5 V; note 7
−
0.65
TYP.
MAX.
UNIT
2.2
2.7
V
2.0
2.5
V
0.2
0.5
V
5
10
µA
VREG2 − 0.15 VREG2 − 0.075 V
VREG2 − 0.35 −
V
0.2
0.3
V
VREG1 − 0.15 VREG1 − 0.075 V
VREG1 − 0.35 −
V
0.2
0.3
V
−
−
mA
16
32
µA
7
50
µs
1
50
µs
4
8
µA
800
−
µA
3.0
3.5
V
35
70
ms
1
400
mV
10.0
10.5
V
10.0
10.5
V
2
75
mV
20
50
mV
25
60
mA
70
−
dB
0.4
0.7
V
1.2
−
A
1997 Jul 09
8