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TDA1305

Stereo 1fs data input up-sampling filter with bitstream continuous dual DAC (BCC-DAC2)

Philips Electronics 

Philips Semiconductors

Stereo 1fs data input up-sampling filter with

bitstream continuous dual DAC (BCC-DAC2)

Preliminary specification

TDA1305T

QUICK REFERENCE DATA

SYMBOL

PARAMETER

CONDITIONS

MIN.

VDDD

digital supply voltage

note 1

3.4

VDDA

analog supply voltage note 1

3.4

VDDO

operational amplifier

note 1

3.4

supply voltage

IDDD

digital supply current

VDDD = 5 V;

−

at code 00000H

IDDA

analog supply current

VDDA = 5 V;

−

at code 00000H

IDDO

operating amplifier supply VDDO = 5 V;

−

current

at code 00000H

VFS(rms)

full-scale output voltage VDDD = VDDA = VDDO = 5 V 1.425

(RMS value)

(THD + N)/S total harmonic distortion at 0 dB signal level

−

plus noise-to-signal ratio

−

at −60 dB signal level

−

−

at −60 dB signal level;

−

A-weighted

−

S/N

signal-to-noise ratio at A-weighting;

100

bipolar zero

at code 00000H

BRns

BRds

fsys

TCFS

Tamb

input bit rate at data input fs = 48 kHz; normal speed −

input bit rate at data input fs = 48 kHz; double speed −

system clock frequency

6.4

full scale temperature

−

coefficient at analog

outputs (VOL and VOR)

operating ambient

−30

temperature

Note

1. All VDD and VSS pins must be connected to the same supply.

TYP.

5.0

5.0

5.0

MAX.

5.5

5.5

5.5

30

−

5.5

8

6.5

9

1.5

1.575

−90

0.003

−44

0.63

−46

0.5

108

−81

0.009

−40

0.1

−

−

−

−

3.072

−

6.144

−

18.432

±100 × 10−6 −

−

+85

UNIT

V

V

V

mA

mA

mA

V

dB

%

dB

%

dB

%

dB

Mbits

Mbits

MHz

°C

1995 Dec 08

3

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