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SI4734-D60-GMR(2013) Ver la hoja de datos (PDF) - Silicon Laboratories

Número de pieza
componentes Descripción
fabricante
SI4734-D60-GMR
(Rev.:2013)
Silabs
Silicon Laboratories 
SI4734-D60-GMR Datasheet PDF : 42 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Si4730/31/34/35-D60
BROADCAST AM/FM/SW/LW RADIO RECEIVER
Features
Worldwide FM band support
Seven selectable AM channel filters
(64–108 MHz)
AM/FM/SW/LW digital tuning
Worldwide AM band support
EN55020 compliant
(520–1710 kHz)
No manual alignment necessary
SW band support (Si4734/35)
Programmable reference clock
(2.3–26.1 MHz)
Adjustable soft mute control
LW band support (Si4734/35)
RDS/RBDS processor (Si4731/35)
(153–279 kHz)
Digital audio out
Excellent real-world performance 2-wire and 3-wire control interface
Integrated VCO
Integrated LDO regulator
Advanced AM/FM seek tuning
Wide range of ferrite loop sticks and
Automatic frequency control (AFC)
air loop antennas supported
Automatic gain control (AGC)
QFN and SSOP packages
Digital FM stereo decoder
RoHS compliant
Programmable de-emphasis
Advanced Audio Processing
Applications
Table and portable radios
Mini/micro systems
CD/DVD and Blu-ray players
Stereo boom boxes
Description
Modules for consumer electronics
Clock radios
Mini HiFi and docking stations
Entertainment systems
The Si473x-D60 digital CMOS AM/FM radio receiver IC integrates the complete
broadcast tuner and receiver function from antenna input to digital audio output.
The device leverages the Silicon Labs broadcast proven digital low-IF
architecture, enabling a cost-effective, digital audio platform for consumer
electronic applications with high TDMA noise immunity, superior radio
performance, and high fidelity audio power amplification.
Functional Block Diagram
FM / SW
ANT
FMI
AM / LW
ANT
AMI
RFGND
2.7~5.5 V (QFN)
2.0~5.5 V (SSOP) VA
+
GND
LNA
AGC
LNA
AGC
LDO
Mux
Mux
Si473x-D60
RDS
(S i4 7 3 1 /
35)
LOW -IF
D IG ITA L
A U D IO
DOUT
DFS
G P O /D C L K
ADC
DAC
DSP
ADC
DAC
ROUT
LOUT
AFC
CONTROL
IN T E R F A C E
VD
1.62 - 3.6 V
Ordering Information:
See page 31.
Pin Assignments
Si473x-D60 (QFN)
NC 1 20 19 18 17 16
FMI 2
15 DOUT
RFGND 3
AMI 4
GND
PAD
14 LOUT/[DFS]
13 ROUT/[DOUT]
RST 5
12 GND
6 7 8 9 10 11 VA
Si473x-D60(SSOP)
DOUT 1
DFS 2
GPO3/[DCLK] 3
GPO2/[INT] 4
GPO1 5
NC
6
NC 7
FMI
8
RFGND 9
NC 10
NC 11
AMI 12
24 LOUT/[DFS]
23 ROUT/[DOUT]
22 DBYP
21 VA
20 VD
19 RCLK
18 SDIO
17 SCLK
16 SEN
15 RST
14 GND
13 GND
This product, its features, and/or its
architecture is covered by one or more of
the following patents, as well as other
patents, pending and issued, both
foreign and domestic: 7,127,217;
7,272,373; 7,272,375; 7,321,324;
7,355,476; 7,426,376; 7,471,940;
7,339,503; 7,339,504.
Rev. 1.2 8/13
Copyright © 2013 by Silicon Laboratories
Si473x-D60

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