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C164CI

16-Bit Single-Chip Microcontroller

Infineon Technologies 

C164CI/SI

C164CL/SL

Table 2

Pin Definitions and Functions (cont’d)

Symbol Pin

No.

Input Function

Outp.

XTAL2 54

O

XTAL1 55

I

XTAL2: Output of the oscillator amplifier circuit.

XTAL1: Input to the oscillator amplifier and input to

the internal clock generator

To clock the device from an external source, drive XTAL1,

while leaving XTAL2 unconnected. Minimum and maximum

high/low and rise/fall times specified in the AC

Characteristics must be observed.

RSTIN 69

I/O Reset Input with Schmitt-Trigger characteristics. A low level

at this pin while the oscillator is running resets the C164CI.

An internal pullup resistor permits power-on reset using only

a capacitor connected to VSS.

A spike filter suppresses input pulses <10 ns. Input pulses

>100 ns safely pass the filter. The minimum duration for a

safe recognition should be 100 ns + 2 CPU clock cycles.

In bidirectional reset mode (enabled by setting bit BDRSTEN

in register SYSCON) the RSTIN line is internally pulled low

for the duration of the internal reset sequence upon any reset

(HW, SW, WDT). See note below this table.

RST 70

O

OUT

Internal Reset Indication Output. This pin is set to a low level

when the part is executing either a hardware-, a software- or

a watchdog timer reset. RSTOUT remains low until the EINIT

(end of initialization) instruction is executed.

NMI 71

I

Non-Maskable Interrupt Input. A high to low transition at this

pin causes the CPU to vector to the NMI trap routine. When

the PWRDN (power down) instruction is executed, the NMI

pin must be low in order to force the C164CI to go into power

down mode. If NMI is high, when PWRDN is executed, the

part will continue to run in normal mode.

If not used, pin NMI should be pulled high externally.

Data Sheet

9

V2.0, 2001-05

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