SAA7374GP Ver la hoja de datos (PDF) - Philips Electronics

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SAA7374GP

Low voltage digital servo processor and Compact Disc decoder (CD7LV)

Philips Electronics 

Philips Semiconductors

Low voltage digital servo processor and

Compact Disc decoder (CD7LV)

Product specification

SAA7374

7.8 DAC interface

The SAA7374 is compatible with a wide range of digital-to-analog converters (DACs). Eleven formats are supported and

are given in Table 4. Figures 11 and 12 show the Philips I2S-bus and the EIAJ data formats respectively. When the

decoder is operated in the lock-to-disc mode, the SCLK frequency is dependent on the disc speed factor ‘d’. All formats

are MSB first and fs is (44.1 × n) kHz. The polarity of the WCLK and the data can be inverted; selectable by register 7. It

should be noted that EF is only a defined output in CD-ROM modes and 1fs modes.

Table 4 DAC interface formats

REGISTER 3

1010

1011

1110

0010

0110

0000

0100

1100

0011

0111

1111

SAMPLE

FREQUENCY

fs

fs

fs

fs

fs

4fs

4fs

4fs

2fs

2fs

2fs

NUMBER OF

BITS

16

16

16/18(1)

16

18

16

18

18

16

18

18

SCLK (MHz)

2.1168 × n

2.1168 × n

2.1168 × n

2.1168 × n

2.1168 × n

8.4672 × n

8.4672 × n

8.4672 × n

4.2336 × n

4.2336 × n

4.2336 × n

FORMAT

CD-ROM (I2S-bus)

CD-ROM (EIAJ)

Philips I2S-bus 16/18 bits(1)

EIAJ 16 bits

EIAJ 18 bits

EIAJ 16 bits

EIAJ 18 bits

Philips I2S-bus 18 bits

EIAJ 16 bits

EIAJ 18 bits

Philips I2S-bus 18 bits

INTERPOLATION

no

no

yes

yes

yes

yes

yes

yes

yes

yes

yes

Note

1. in this mode the first 16 bits contain data, but if any of the fade, attenuate or de-emphasis filter functions are activated

then the first 18 bits contain data.

1998 Feb 26

16

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