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S29GL064A11BFER90 Datasheet PDF : 89 Pages
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Advance Information
Table 43. Alternate CE# Controlled Erase and Program Operations-S29GL032A
Parameter
JEDEC
Std.
Description
Speed Options
90
10
11
Unit
tAVAV
tWC
Write Cycle Time (Note 1)
Min
90
100
110
ns
tAVWL
tAS
Address Setup Time
Min
0
ns
tELAX
tAH
Address Hold Time
Min
45
ns
tDVEH
tDS
Data Setup Time
Min
35
ns
tEHDX
tDH
Data Hold Time
Min
0
ns
tGHEL
tGHEL
Read Recovery Time Before Write
(OE# High to WE# Low)
Min
0
ns
tWLEL
tWS
WE# Setup Time
Min
0
ns
tEHWH
tWH
WE# Hold Time
Min
0
ns
tELEH
tCP
CE# Pulse Width
Min
35
ns
tEHEL
tCPH
CE# Pulse Width High
Min
25
ns
Write Buffer Program Operation (Notes 2, 3)
Typ
240
tWHWH1
tWHWH1
Single Word Program Operation (Note 2)
Accelerated Single Word Program Operation (Note 2)
Typ
60
µs
Typ
54
tWHWH2
tWHWH2 Sector Erase Operation (Note 2)
Typ
0.5
sec
tRH
RESET# High Time Before Write
Min
50
ns
tPOLL
Program Valid before Status Polling (Note 4)
Max
4
µs
Notes:
1. Not 100% tested.
2. See Erase And Programming Performance on page 81 for more information
3. For 1–16 words/1–32 bytes programmed.
4. If a program suspend command is issued within tPOLL, the device requires tPOLL before reading status data, once programming resumes
(that is, the program resume command is written). If the suspend command was issued after tPOLL, status data is available immediately
after programming resumes. See Figure 24, on page 80.
78
S29GL-A MirrorBit™ Flash Family
S29GL-A_00_A3 April 22, 2005
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