RJK5003DPD-00-J2(2010) Ver la hoja de datos (PDF) - Renesas Electronics

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fabricante

RJK5003DPD-00-J2
(Rev.:2010)

Silicon N Channel Power MOS FET High Speed Power Switching Use

Renesas Electronics 

RJK5003DPD

Preliminary

Electrical Characteristics

(Tch = 25°C)

Parameter

Symbol Min. Typ. Max. Unit

Test conditions

Drain to source breakdown voltage V(BR)DSS 500

—

—

V

ID = 1 mA, VGS = 0 V

Zero gate voltage drain current

IDSS

—

—

1

mA VDS = 500 V, VGS = 0 V

Gate to source leak current

IGSS

—

—

0.1

A VGS = 30 V, VDS = 0 V

Gate to source cutoff voltage

Static drain to source on state

VGS(off)

3.0

3.5

4.0

RDS(on)

—

1.3

1.5

V

ID = 1 mA, VDS = 10 V



ID= 2 A, VGS = 10 VNote2

resistance

Input capacitance

Output capacitance

Ciss

Coss

—

550

—

—

60

—

pF VDS = 25 V, VGS= 0 V,

pF f = 1 MHz

Reverse transfer capacitance

Crss

—

10

—

pF

Turn-on delay time

td(on)

—

20

—

ns VDD = 200 V, ID = 2 A,

Rise time

Turn-off delay time

tr

—

20

—

ns VGS = 10 V

td(off)

—

60

—

ns RG = 25 

Fall time

tf

—

25

—

ns

Body-drain diode forward voltage

VDF

—

1.0

1.5

V

IF = 2 A, VGS = 0 V Note2

Note: 2. Pulse test

Noftorrenceowmmdeesnidgn

R07DS0049EJ0400 Rev.4.00

Jul 22, 2010

Page 2 of 6

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