PSD4105F1V-12 Ver la hoja de datos (PDF) - STMicroelectronics

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PSD4105F1V-12

Flash In-System-Programmable Peripherals for 16-Bit MCUs

STMicroelectronics 

Preliminary Information

The

PSD4000

Functional

Blocks

(cont.)

Figure 3. Data Polling Flow Chart

START

READ DQ5 & DQ7

(DQ13 & DQ15)

at VALID EVEN ADDRESS

DQ7

(DQ15)

=

DATA7

(DATA15)

YES

NO

NO

DQ5

(DQ13)

=1

YES

READ DQ7

(DQ15)

DQ7

(DQ15)

=

DATA7

(DATA15)

YES

NO

FAIL

Program/Erase

Operation Failed

Issue Reset Instruction

PASS

Program/Erase

Operation is

Completed

PSD4000 Series

9.1.1.6.2 Data Toggle

Checking the Data Toggle bit on DQ6 (DQ14) is a method of determining whether a

Program or Erase instruction is in progress or has completed. Figure 4 shows the Data

Toggle algorithm.

When the MCU issues a programming instruction, the embedded algorithm within the

PSD4000 begins. The MCU then reads the location to be programmed in Flash to check

status. Data bit DQ6 (DQ14) of this location will toggle each time the MCU reads this

location until the embedded algorithm is complete. The MCU continues to read this

location, checking DQ6 (DQ14) and monitoring the Error bit on DQ5 (DQ13) . When

DQ6 (DQ14) stops toggling (two consecutive reads yield the same value), and the Error bit

on DQ5 (DQ13) remains ‘0’, then the embedded algorithm is complete. If the Error bit on

DQ5 (DQ13) is ‘1’, the MCU should test DQ6 (DQ14) again, since DQ6 (DQ14) may have

changed simultaneously with DQ5 (DQ13) (see Figure 4).

The Error bit at DQ5 (DQ13) will be set if either an internal timeout occurred while the

embedded algorithm attempted to program, or if the MCU attempted to program a ‘1’ to a

bit that was not erased (not erased is logic ‘0’).

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