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PIC16F1824-I

28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology

Microchip Technology 

3.2.2 SPECIAL FUNCTION REGISTER

The Special Function Registers are registers used by

the application to control the desired operation of

peripheral functions in the device. The registers asso-

ciated with the operation of the peripherals are

described in the appropriate peripheral chapter of this

data sheet.

3.2.3 GENERAL PURPOSE RAM

There are up to 80 bytes of GPR in each data memory

bank.

3.2.3.1 Linear Access to GPR

The general purpose RAM can be accessed in a

non-banked method via the FSRs. This can simplify

access to large memory structures. See Section 3.5.2

“Linear Data Memory” for more information.

3.2.4 COMMON RAM

There are 16 bytes of common RAM accessible from all

banks.

FIGURE 3-2:

BANKED MEMORY

PARTITIONING

7-bit Bank Offset

Memory Region

00h

Core Registers

(12 bytes)

0Bh

0Ch

Special Function Registers

(20 bytes maximum)

1Fh

20h

PIC16(L)F1824/1828

3.2.5 DEVICE MEMORY MAPS

The memory maps for the device family are as shown

in Table 3-2.

TABLE 3-2: MEMORY MAP TABLES

Device

PIC16F/LF1824/1828

Banks

0-7

8-15

16-23

24-31

31

Table No.

Table 3-3

Table 3-4

Table 3-5

Table 3-6

Table 3-7

General Purpose RAM

(80 bytes maximum)

6Fh

70h

Common RAM

(16 bytes)

7Fh

 2010 Microchip Technology Inc.

Preliminary

DS41419B-page 27

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