Philips Semiconductors
8-bit serial-in/parallel-out shift register
Product specification
74LV164
AC CHARACTERISTICS
GND = 0V; tr = tf ≤ 2.5ns; CL = 50pF; RL = 1KΩ
SYMBOL
PARAMETER
WAVEFORM
CONDITION
VCC(V)
1.2
tPHL/tPLH
Propagation delay
CP to Qn
Figure 1
2.0
2.7
3.0 to 3.6
4.5 to 5.5
1.2
tPHL
Propagation delay
MR to Qn
Figure 2
2.0
2.7
3.0 to 3.6
4.5 to 5.5
2.0
tW
Clock pulse width
HIGH to LOW
Figure 1
2.7
3.0 to 3.6
4.5 to 5.5
2.0
tW
Master reset pulse
width; LOW
Figure 2
2.7
3.0 to 3.6
4.5 to 5.5
1.2
trem
Removal time
MR to CP
Figure 2
2.0
2.7
3.0 to 3.6
4.5 to 5.5
1.2
tsu
Set-up time
Dsa, Dsb to CP
Figure 3
2.0
2.7
3.0 to 3.6
4.5 to 5.5
1.2
th
Hold time
Dsa, Dsb to CP
Figure 3
2.0
2.7
3.0 to 3.6
4.5 to 5.5
2.0
fmax
Maximum clock
pulse frequency
Figure 1
2.7
3.0 to 3.6
4.5 to 5.5
NOTE:
1. Unless otherwise stated, all typical values are at Tamb = 25°C.
2. Typical value measured at VCC = 3.3V.
3. Typical value measured at VCC = 5.0V.
LIMITS
–40 to +85 °C
MIN TYP1 MAX
–
75
–
–
26
39
–
19
29
–
142
23
–
122
19
–
75
–
–
26
39
–
19
29
–
142
23
–
122
19
34
9
–
25
6
–
20
52
–
13
42
34
10
–
25
8
–
20
62
–
13
52
–
30
–
19
10
–
14
8
–
11
62
–
8
52
–
15
–
22
5
–
16
4
–
13
32
–
9
22
–
–10
–
5
–3
–
5
–2
–
5
–22
–
5
–12
14
40
–
19
58
–
24
702
–
36
1002
LIMITS
–40 to +125 °C
MIN MAX
–
–
–
49
–
36
–
29
–
24
–
–
–
49
–
36
–
29
–
24
41
–
30
–
24
–
16
41
–
30
–
24
–
16
–
–
24
–
18
–
14
–
10
–
–
26
–
19
–
15
–
10
–
–
5
–
5
–
5
–
5
12
–
16
–
20
–
30
UNIT
ns
ns
ns
ns
ns
ns
ns
MHz
1998 May 07
6